Section IV – Diagrams
Figure 8. Wiring Diagram, PA-6
PA-6 Terminal Connections
Note: Pulse Inputs
• If EPLD (U24 chip) is Rev. 0, dual pulse will not function under 25 Hz. Only single pulse will count from 25 Hz
down to 3 Hz. Above 25 Hz, dual pulse will function as normal.
• If EPLD (U24 chip) is Rev. 1 or higher, dual pulse will function from 3 Hz and higher.
• Pulse doubling will not function for input pulses below 25 Hz.
14
13
12
11
10
9
8
7
6
5 Shield
4
3
2 A-
1 A+
CN5
5
4 Gnd
3 +12Vdc
2
1
CN6
PA-6
MNET Board
PA-6, Single Pulse
5
3
1
14
13
12
11
10
9
8
7
6
5 Shield
4
3
2 A-
1 A+
CN5
5
4 Gnd
3 +12Vdc
2
1
CN6
PA-6
MNET Board
PA-6, Dual Pulse
5
3
1
PA-6
5
3
1
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