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Tektronix 2235 User Manual

Tektronix 2235
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T
h
eo
r
y
of
O
pe
r
ation-2235
Service
B
uffer
Amplifie
r
an
d
Gai
n
Switc
h
ing N
etwor
k
P
ara
ph
ase
Am
p
lifie
r
T
he B
uffer
Am
p
lifier
p
resents
α
h
ig
h
-im
pe
d
ance,
low-ca-
T
he
P
araph
ase
Am
p
lifier
co
n
verts
t
h
e
single-e
n
ded
sig-
pacita
nce
load to
t
he
signal
from
t
he
H
ig
h
-Im
pe
d
ance
Atte
n
-
nal
from
t
he Gain Switc
h
ing
N
etwork
into
α
differe
n
tial
sig-
u
ator
a
nd α
low
outp
ut
impe
d
ance
to
t
h
e
Gain Switch
i
ng
ηαΙ for
a
pp
lication
to
t
he
V
ertical
P
ream
p
lifie
r
. I
n
cluded
i
n
N
etwor
k
.
Α
dual-
p
at
h
amplifier
is
use
d
to
com
b
ine
h
ig
h
-
d
c
t
he
ci
r
cuitry
is
switc
h
ing
t
h
at
provides
extra
gain
for
t
h
e
sta
b
ility
wit
h h
ig
h
-s
p
eed
p
erforman
ce
.
2
mV
p
osition
of
t
he
V
O
L
TS/DI
V
switc
h
,
ad
j
ustme
n
ts fo
r
am
p
lifier
do
b
alance,
a
nd
circuitry
fo
r t
heV
aria
b
le
V
olts/Div
function
.
A
d
ditio
n
ally,
t
he
C
h
annel
2
P
ara
ph
ase
Am
p
lifie
r
In
t
he slow p
at
h
,
t
he
input
sig
n
al is
a
pp
lied
to
b
ot
h
t
he
con
tains
circ
u
itry
to
invert
t
h
e
C
hann
el
2
dis
p
lay
.
gate
of
source-followe
r
Q13
and
t
h
e
inverting
in
p
ut
of
U
10
t
h
ro
ugh
t
h
e
divide-by-two
netwo
rk
compose
d
of
R
3
a
n
dR5
.
Tran
sistor
Q13
an
d
emitte
r
-followe
r
Q18
isolate
t
he
i
npu
t
T
h
e
sig
n
al
from
t
h
e
Gain Switch
ing
N
etwo
rk
is
ap
p
lied
to
sig
n
al
from
t
h
e
loa
d
ing
of
t
h
e
Gain Switch
ing
N
etwor
k
.
T
he
t
he b
ase
of
one
tr
a
n
sistor
in
U
30
.
T
he
ot
h
er
in
p
ut
transistor
divider
n
etwor
k
at
t
h
e
output
of
t
h
e
Am
p
lifier
(1146, 1347,
and
is
b
iased
b
y
t
he
divider
network
com
p
osed
of
R
30,
R
31,
and
R
48)
is
connected
to
t
he
ot
h
e
r
i
npu
t
of
U
10
.
Am
p
lifier
U
10
R
33
to
α
level
t
h
at
will
p
rod
uce α
null
b
etwee
n
t
h
e
outpu
ts of
com
p
ares
t
he
two
divider
voltages
and
c
han
ges
t
he
co
n
duc-
U
30
(no
trace
sh
ift
on
t
h
e
crt
screen
)
w
hen
t
he
V
O
L
TS/DI
V
tion level of
current-so
u
rce
transistor
015
to
cor
r
ect
for
any
control
is
switc
h
ed
between
5
mV
and
2
m
V
.
E
mitter
cur
r
e
n
t
error
at
t
h
e
sou
r
ce
of
013
.
Ca
p
acito
r
C10
limits
t
h
e
ban
d
-
for
t
he
two
in
pu
t
transistors
is
su
pp
lied
by
R
21,
R
22,
R
23,
widt
h
of
U
10
so
t
h
at
t
h
e slow p
at
h r
esp
onds
o
n
ly
to
fre-
and
R
25,
wit
h
R
29
se
r
vi
ng
as
t
h
e
gain-setti
ng
resistor
be-
q
uencies
b
elow
100
kH
z
.
tween
t
he
two
emitters
.
In
t
he
2
m
Vp
osition,
am
p
lifie
r
gai
n
is
i
n
creased
b
y
closi
ng
contact
15
of
S10
to
shunt
R
29
wit
h
R
26
.
In
t
h
e
fast
p
at
h
,
input
signals
are
cou
p
le
d
t
hrough
R
6,
C6, 013,
and
Q18
to
t
he
ci
r
cuit
output
.
By
ad
j
usting
R
47,
t h
e
gai
n
in
bot
h
p
at
h
s
is
matc
h
ed
.
In
p
ut
offset
voltage
com-
T
he
collecto
r
current
t
h
roug
h
t
h
e
two
in
p
ut
tra
n
sisto
r
s
p
e
n
sation fo
r
U
10
is
provided
by
R
10
to
eliminate
trace
serves
as
emitter curre
n
t
for
t
h
e
two
d
iffe
r
ential
out
p
ut
tran-
sh
ifts
w
he
n
switc
h
i
ng
betwee
n
V
olts/Div
settings
.
sisto
r
p
airs
.
B
ase-bias
voltages
fo
r t
h
e
two
p
airs
a
r
e
derived
from
t
h
e
d
ivider
networ
k
com
p
osed
of
R
39,
R
41,
R
42,
and
R
43
.
M
onolit
h
ic
IC
U
30
h
as
matc
h
e
d
tra
n
sistor
ch
aracte
r
is
T
he
Gain
Switch
ing
N
etwor
k
divides
d
own
t
h
e
B
uffer
tics,
so
t
he
r
atio
of
curre
n
ts
in
t
h
e
two
diodes
connected
to
Am
p
lifier
o
u
t
p
ut
sig
n
al
for
a
pp
licatio
n
to
t
he P
arap
h
ase
Am-
p
in
11
d
etermines
t
he
c
u
rrent
ratios
in
t
he
o
u
t
p
ut
t
r
a
n
sisto
r
p
lifier
and
h
as an outpu
t
impedance
of
75
Ω
for
all
V
olts/Div
pairs
.
As
V
O
LTS/DI
VV
ariable
p
otentiometer
R
43
is
rotated
switc
h
settings
.
T
h
e
particular
V
olts/Div
switc
h
setting
will
from
t
h
e
calibrated
to
uncalibrated
positio
n
,
t
h
e
co
ndu
ctio
n
determine
w
h
ic
h
co
n
tacts
of
S10
are closed
and
t
h
erefore
level
of
t
he
tra
n
sistors
connected
to
R
35
will
increase
.
Since
w
h
et
h
er
t
he
P
ara
p
h
ase
Amplifier
will
receive
α
-
1,
-
2,
t
h
e
transistor
p
air
out
pu
ts
are
cross-wire
d
,
t
h
is
i
ncreased
4,
or
-
10
signal
.
co
ndu
ction
will
subtract
from
t
he
signal
p
roduced
by
t
h
e
FR
O
M
VER
T
I
CAL INPU
T
COUPL
I
NG
ΗΙ
GΗ
-Ζ
ATTENUATO
R
=1
,
=
10,
=1 θ0
--a-
BUFFER
A
MPL
S
LO
W
PATH
U
10
>
Q15
BUFFER
A
MPL
F
AST
PATH
ρ13,
Q18
FRE
Q
UEN
CY
GAI
N
B
A
LANCE
R
47
F
ig
ur
e
3-1
.
B
loc
kd
iag
r
am
of
t
h
e V
ertical
Atte
nu
ato
r
s
.
GA
I
N
S
W
I
TC
H
I
NG
τ0
NE
T
W
O
RK
VERTICAL
=1
,
=Ζ
,
PRE
AMP
=4,
+10
42
θ
6
-1
θ

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Tektronix 2235 Specifications

General IconGeneral
BrandTektronix
Model2235
CategoryTest Equipment
LanguageEnglish

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