Tektronix 7834 - Page 80

Theory of
Operation-7834
produced if : 1 . VERTICAL MODE
switch is set to CHOP ;
2 . Dual-trace vertical unit is operating
in the chopped mode
and is being displayed ;
3 . Dual-trace vertical unit operating
in the chopped
mode with the VERTICAL MODE switch
set to
ADD . The repetition rate of the negative-going
Verti-
cal Chopped
Blanking pulse output at pin 4 is two mega-
hertz for all of
the above conditions as determined by the
Clock Generator stage
.
LEFT PLUG-IN MODE < 5
(CHOP INHIBIT)
3- 2 4
INPUT
Figure 3-17 shows a logic diagram
and
an
input/output table
for the Vertical Chopped
Blanking stage . Notice the com-
parator block on the diagram
. The output of this compara-
tor is
determined by the relationship between the levels of
its inputs . If pin 10 is more positive (H I) than the
grounded
input,
the
output
is HI also : if it is more negative, the
output is LO .
A
~ Q
O

IQ,
OQ
A 2'
O
JO
O
Ow
JOB
Z

m
ALL
OTHER COMBINATIONS
4
2
LO
LO
LO
LO
HI
v0
QT2
OUTPUT
CONDITIONS
CHOP
MODE (VERT)
LEFT' PLUG-IN CHOPPED
RIGHT PLUG-IN CHOPPED
ADD MODE, LEFT OR RIGHT
PLUG-IN CHOPPED
NO
VERTICAL CHOPPED BLANKING
PULSES AT OUTPUT
4) = HAS NO EFFECT
IN THIS CASE
'RAMP SIGNAL ; CONSIDERED LO
WHEN MORE NEGATIVE THAN ABOUT ZERO VOLTS .
2 NEGATIVE-GOING
PULSE AT TWO MEGAHERTZ RATE .
'PIN 5 CAN BE HI AND NOT AFFECT
OPERATION IF PIN 8 IS LO, AND VICE VERSA .
Figure
3-17 . (A)
Logic diagram for Vertical Chopped Blanking stage ;
(B)
Table of input/output combinations .
(1195-17) 1988-42
CZ
OC
3
~
v~Cj
~O
5
~
O
~
U
O
6
0
0
7
4`
VS
O~OQ
8 10'
HI (G LO (D LO
_
LO LO
_
L
O - . .
(V LO
LO (D HI LO
-
LO LO
LO LO' LO HI LO'
t
LO