Advisory (continued) FPU: LUF, LVF Flags are Invalid for the EINVF32 and EISQRTF32 Instructions
Note
NOTES ON COMPILER AND TOOLS USAGE
The compiler does not use LVF/LUF as condition codes for conditional
instructions and neither does the Run Time Support (RTS) Library test LVF/LUF
in any way.
The compiler may generate code that modifies LVF/LUF, meaning the value of
the STF register (that contain these flags) is undefined at function boundaries.
Thus, although the sqrt routine in the library may cause LVF/LUF to be set,
there is no assurance in the CGT that the user can read these bits after sqrt
returns.
Although the compiler does provide the __eisqrtf and __einvf32 intrinsics, it
does not provide an intrinsic to read the LVF/LUF bits or the STF register. Thus,
the user has no way to access these bits from C code.
The use of inline assembly code to read the STF register is unreliable
and is discouraged. The workaround presented in the Workarounds section
is applicable to assembly code that uses the EISQRTF32 and EINVF32
instructions and does not call any compiler-generated code. For C code, the
user must consider these flags to be unreliable, and therefore, neither poll
these flags in code nor trigger interrupts off of them.
www.ti.com Silicon Revision C Usage Notes and Advisories
SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023
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TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon
Revisions C, B, A, 0)
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