3 Silicon Revision C Usage Notes and Advisories
This section lists the usage notes and advisories for this silicon revision.
3.1 Silicon Revision C Usage Notes
This section lists all the usage notes that are applicable to silicon revision C [and earlier silicon revisions].
3.1.1 PIE: Spurious Nested Interrupt After Back-to-Back PIEACK Write and Manual CPU Interrupt Mask
Clear
Revisions Affected: 0, A, B, C
Certain code sequences used for nested interrupts allow the CPU and PIE to enter an inconsistent state that can
trigger an unwanted interrupt. The conditions required to enter this state are:
1. A PIEACK clear is followed immediately by a global interrupt enable (EINT or asm(" CLRC INTM")).
2. A nested interrupt clears one or more PIEIER bits for its group.
Whether the unwanted interrupt is triggered depends on the configuration and timing of the other interrupts in
the system. This is expected to be a rare or nonexistent event in most applications. If it happens, the unwanted
interrupt will be the first one in the nested interrupt's PIE group, and will be triggered after the nested interrupt
reenables CPU interrupts (EINT or asm(" CLRC INTM")).
Workarounds: Add a NOP between the PIEACK write and the CPU interrupt enable. Example code is shown
below.
//Bad interrupt nesting code
PieCtrlRegs.PIEACK.all = 0xFFFF; //Enable nesting in the PIE
EINT; //Enable nesting in the CPU
//Good interrupt nesting code
PieCtrlRegs.PIEACK.all = 0xFFFF; //Enable nesting in the PIE
asm(" NOP"); //Wait for PIEACK to exit the pipeline
EINT; //Enable nesting in the CPU
3.1.2 Caution While Using Nested Interrupts
Revisions Affected: 0, A, B, C
If the user is enabling interrupts using the EINT instruction inside an interrupt service routine (ISR) in order to
use the nesting feature, then the user must disable the interrupts before exiting the ISR. Failing to do so may
cause undefined behavior of CPU execution.
3.1.3 SYS/BIOS: Version Implemented in Device ROM is not Maintained
Revisions Affected: 0, A, B, C
The SYS/BIOS version 6.37 in ROM cannot be updated to address bug fixes or enhancements. For applications
using this ROM version of SYS/BIOS, the user should review the release notes on the SYS/BIOS Product
Releases page to assess any application impact to known bugs.
To use the latest maintained SYS/BIOS version, download the SYS/BIOS library and include in the application
flash image instead of using the ROM version.
www.ti.com Silicon Revision C Usage Notes and Advisories
SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023
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TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon
Revisions C, B, A, 0)
9
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