Advisory INTOSC: V
DDOSC
Powered Without V
DD
Can Cause INTOSC Frequency Drift
Revisions Affected
0, A, B, C
Details The "K" revision of the TMS320F2837xD Dual-Core Real-Time Microcontrollers data
sheet (SPRS880K) has updated power sequencing requirements. Revision "J" and earlier
revisions of the data sheet did not require V
DDOSC
and V
DD
to be powered on and
powered off at the same time.
If V
DDOSC
is powered on while V
DD
is not powered, there will be an accumulating
and persistent downward frequency drift for INTOSC1 and INTOSC2. The rate of drift
accumulated will be greater when V
DDOSC
is powered without V
DD
at high temperatures.
As a result of this drift, the INTOSC1 and INTOSC2 internal oscillator frequencies could
fall below the minimum values specified in the data sheet. This would impact applications
using INTOSC2 as the clock source for the PLL, with the system operating at a lower
frequency than expected.
Workarounds 1. Keep V
DDOSC
and V
DD
powered together.
2. Use the external X1 and X2 crystal oscillators as the PLL clock source. The crystal
oscillator does not have any drift related to V
DDOSC
and V
DD
supply sequencing.
www.ti.com Silicon Revision C Usage Notes and Advisories
SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023
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TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon
Revisions C, B, A, 0)
29
Copyright © 2023 Texas Instruments Incorporated
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