Advisory ADC: ADC Input Multiplexer Connection at Beginning of Acquisition Window
Revisions Affected
0, A
Details The input of the ADC may experience a brief connection to either V
SSA
or another input
channel at the beginning of the sample-and-hold phase of the conversion. The conditions
where this occurs are summarized below:
• If the previously converted channel is the same as the currently converting channel,
then no additional connection occurs.
• If the previously converted channel and the currently converting channel are both
odd-numbered channels or both even-numbered channels (for example, A6 and A14),
then the two channels will be briefly connected.
• If the previously converted channel and the currently converting channel are not both
odd-numbered channels or not both even-numbered channels (for example, A6 and
A15), then the currently converting channel will be briefly connected to V
SSA
.
In the worst case, the connection resistance could be as low as 30 Ω and the duration of
the connection could be as long as 5 ns.
Workarounds This typically will not present a significant issue for low-impedance signal sources (for
example, an op-amp). For high-impedance sources, it may be necessary to increase the
duration of the acquisition window beyond what would be suggested by the characteristics
of the ADC input model.
Advisory ADC: ADC Sparkle Codes
Revisions Affected
0, A
Details The ADC may give conversion results with large random errors (sparkle codes). When
present, this is typically observed as a large jump in the conversion result for a single
code while sampling a continuously varying waveform.
Workarounds Bad codes can be reduced by writing the value 0x7000 to memory locations 0x0000 743F,
0x0000 74BF, 0x0000 753F, and 0x0000 75BF.
This workaround is valid only on the revisions affected.
Silicon Revision A Usage Notes and Advisories www.ti.com
44 TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon
Revisions C, B, A, 0)
SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023
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