TYAN S7106 - Page 19

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19
DBG_HD1: TYAN Module Header
Signal
Pin
Pin
Signal
P3V3
1
2
FRAME_N
LAD0
3
4
KEY
LAD1
5
6
PLT_RST_N
LAD2
7
8
GND
LAD3
9
10
CLK_33M
DBG_SERIRQ
11
12
GND
DBG_PRES_N
13
14
VCC3_AUX
TPM_ADDR_MB
15
16
PCH_TPM_PP_EN
USB3_FPIO1: Front USB3.0 Header
Signal
Pin
Pin
Signal
+5V
1
2
P0_RX_N
P0_RX_P
3
4
GND
P0_TX_N
5
6
P0_TX_P
GND
7
8
P0_N
P0_P
9
10
OC_N
P1_P
11
12
P1_N
GND
13
14
P1_TX_P
P1_TX_N
15
16
GND
P1_RX_P
17
18
P1_RX_N
+5V
19
20
Key
J26: Internal USB2.0 Header
Signal
Pin
Pin
Signal
+5V
1
2
+5V
USB DATA1-
3
4
USB DATA2-
USBDATA1+
5
6
USB DATA2+
GND
7
8
GND
KEY
9
10
GND
SSATA_SGPIO1: SSATA SGPIO Header for SSATA4/SSATA5
Signal
Pin
Pin
Signal
SMBCLK
1
2
SDATA IN
SMBDATA
3
4
SDATA OUT
GND
5
6
SLOAD
KEY
7
8
SCLOCK
VCC3_AUX
9
10
HD_ERROR_LED