THEORY OF OPERATION
4-14
Versapulse Select Service Manual
0621-499-01 01/94
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Refer to the Servo Motor Control Circuit Simplified Diagram (figure 4.3) and to the associated schematics in
Section 8. Motor controller U30 receives position commands from the main processor over the microprocessor
bus. It outputs direction and pulse commands to Servo Amp PCB motor supply U1. The motor supply
provides switched DC to the motor, in the polarity indicated by the direction input from the motor controller,
and in time increments as indicated by the pulse input. Note that in the Versapulse Select the motor always
moves in the same direction, but the reverse direction signal is still used to providing braking force as the
motor approaches a new stop position.
Motor movement information is fed back to the motor controller from an optical sensor located behind the
motor. The channel A and B feedback lines each provide 2000 counts per revolution, and are offset from each
other to provide a total of 4000 counts for one rotation. The position sensor also detects a specific position,
referred to as the index position. The index position information is reported to the main processor through a
digital I/O input port as /SRVINDX/. Once the index position is found, the motor controller tracks position
by monitoring the channel A and B lines from the position sensor to determine the sum of the movement
away from this known index position.
4.4.5 HVPS & PFN Control Circuits
The HVPS and PFN control circuits oversee the charging and discharging of the main charging capacitor,
monitor the charge on the capacitor, and monitor several status signals from the high voltage power supply.
Refer to the HVPS & PFN Interface Circuits Simplified Diagram (Figure 4.4) and to the related schematics in
Section 8. The main charging capacitor is charged by the vendor supplied high voltage power supply, re-
ferred to as the HVPS. The control circuit on the CPU PCB sends the HVPS a charge enable (RS ENABLE)
signal and charge level information (HVPS DR VOLTS). The HVPS sends fault status (TEMP OL, CURRENT
OL, NO CURRENT REVERSAL ), charge level (CAP FD BK), and charge complete (CHARGE) signals to the
control circuit.
To discharge the capacitor through a particular flash lamp, the control circuit on the CPU PCB routes a fire
pulse (/FIREPLS/) to one of the four trigger circuits on the Isolated Trigger PCB. When the fire pulse is
asserted, the selected trigger circuit will gate on an SCR to create a complete path for capacitor discharge
through the selected lamp.
CHARGING PROCESS - The main processor first calculates the level of charge required to provide the
selected pulse energy at the selected pulse rate. The selected energy and pulse rate index a capacitor charge
value in the stored calibration data. The data is established during automatic laser calibration and updated by
light feedback information from any previous pulses at the selected operating point.
The first pulse of a treatment delivery (i.e., the first pulse after the footswitch is depressed) includes a correc-
tion factor to compensate for differences in cavity output that occur before the thermal lens has formed.
Subsequent pulses do not require this correction factor.
Once the main processor has determined the level of charge required, it writes the digital value for the
required voltage to DAC U10. The DAC output, HVDAC, is 0 to 5 VDC for a main capacitor charging voltage
of 700 volts to 1400 volts. The HVDAC signal is sent through amplifier U15, analog opto-isolator U14, and
amplifier U101 to become HVPS DR VOLTS, out on J2-18 of the CPU PCB to the HVPS module. Note that the
HVDAC signal is also input to both the main processor and safety processor ADC circuits.
12/95
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