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Wang 5536 - Basic Workstation Functions; Z80 A Cpu; Diagnostic Memory; Parity Generation and Test

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3402
2.2
BASIC
WORKSTATION
FUNCTIONS
2.2.1
Z80A
CPU
P s
operations
are
controlled
by
the
Z80A
Central
Processor
(CPU).
The
CPU
receives
sequential
instructions
from
Main
Memory
over
the
data
bus.
It
assigns
device
access
and
tasks
based
on
these
instructions
and
communicates
with
workstation
logic
through
the
data,
address,
and
control
busses.
2.2.2
DIAGNOSTIC
MEMORY
A
diagnostic
PROM
contains
special
instructions
to
facilitate
component-
1eve1
ma
in
tenan
ce
and
repair.
_Th_e_P_R_O_M
__
i_s
__
on_l~y_u_s_e_d
__
d_u_r_1_·
n~g
__
t_h_e_r_e_p_a_i_r_o_f
the
7545
PCA
at
the
repair
facility
and
therefore
is
not
shipped
with
the
workstation.
2.2.3
PARITY
GENERATION
AND
TEST
The
Parity
Generator/Tester
checks
CPU
before
it
enters
the
processor.
user
through
CRT
display
messages.
2.2.4
IN-OUT
DECODERS
the
accuracy
of
all
data
received
by
the
Parity
errors
are
communicated
to
the
Memory
instructions
IN
and
OUT
instruct
the
CPU
to
transfer
data
into
or
out
of
an
I/0
device
rather
than
memory. The IN-OUT
decoder
identifies
the
selected
I/O
device.
2.2.5
KEYBOARD
INTERFACE
LOGIC
During
an
appropriate
IN
instruction
the
Keyboard
Interface
places
a
character
code
onto
the
Data
Bus.
The
CPU
examines
the
character
and
stores
it
in
the
CRT
memory
buffer
to
be
placed
on
the
CRT
display.
2.2.6
VIDEO
DISPLAY
LOGIC
Video
Display
Logic
continuously
reads
characters
from
CRT
memory,
converts
them
into
an
appropriate
stream
of
video
dots,
and
arranges
these
dots
on
the
CRT
display.
Video
Display
Logic
also
reads
a
Control
Memory.
This
Control
Memory
indicates
the
display
status
of
each
character:
normal,
intensified,
underlined,
etc.
2.2.
7
DATA
LINK
The
Data
Link
permits
workstation
memory
to
be
loaded
(or
read)
by
the
master.
The
master
can
wri.te
new memory
instructions
into
workstation
memory;
it
can
also
record
(archive)
information
entered
by
the
workstation
onto
a common
disk.
The
workstation
CPU
is
disabled
when
the
Master
uses
the
Data
Link
•.
During
tb,is
time
Direct
Memory
Access
(DMA)
logic,
rather
than
the
CPU,
synchronizes
memory
read/write
operations.
DMA
logic
does
not
support
CRT
memory
transfers.
2-2

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