VCU1525 Acceleration Platform User Guide 26
UG1268 (v1.0) November 13, 2017 www.xilinx.com
Chapter 3: Board Component Descriptions
The system and QSFP0 clock source Si5335A U9 is shown in Figure 3-6.
The 300 MHz clock buffer Si53340 U44 is shown in Figure 3-7.
X-Ref Target - Figure 3-7
Figure 3-7: 300MHz and QSFP0 156.25MHz Clock Source
X-Ref Target - Figure 3-8
Figure 3-8: 300 MHz Clock Buffer
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