Name: Xilinx VCU1525
Brand: Xilinx
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VCU1525 Acceleration Platform User Guide 63

UG1268 (v1.0) November 13, 2017 www.xilinx.com

Appendix A: Master Constraints File Listing

set_property PACKAGE_PIN B29 [get_ports DDR4_C2_DQS_C12];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C2_DQS_C12];

set_property PACKAGE_PIN C29 [get_ports DDR4_C2_DQS_T12];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C2_DQS_T12];

set_property PACKAGE_PIN F37 [get_ports DDR4_C2_DQS_C13];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C2_DQS_C13];

set_property PACKAGE_PIN G37 [get_ports DDR4_C2_DQS_T13];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C2_DQS_T13];

set_property PACKAGE_PIN R31 [get_ports DDR4_C2_DQS_C14];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C2_DQS_C14];

set_property PACKAGE_PIN T30 [get_ports DDR4_C2_DQS_T14];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C2_DQS_T14];

set_property PACKAGE_PIN L34 [get_ports DDR4_C2_DQS_C15];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C2_DQS_C15];

set_property PACKAGE_PIN M34 [get_ports DDR4_C2_DQS_T15];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C2_DQS_T15];

set_property PACKAGE_PIN H34 [get_ports DDR4_C2_DQS_C16];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C2_DQS_C16];

set_property PACKAGE_PIN H33 [get_ports DDR4_C2_DQS_T16];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C2_DQS_T16];

set_property PACKAGE_PIN C38 [get_ports DDR4_C2_DQS_C17];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C2_DQS_C17];

set_property PACKAGE_PIN C37 [get_ports DDR4_C2_DQS_T17];

set_property IOSTANDARD DIFF_POD12 [get_ports DDR4_C2_DQS_T17];

# DDR4 C3 DIMM I/F

set_property PACKAGE_PIN K15 [get_ports DDR4_C3_ADR0];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C3_ADR0];

set_property PACKAGE_PIN B15 [get_ports DDR4_C3_ADR1];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C3_ADR1];

set_property PACKAGE_PIN F14 [get_ports DDR4_C3_ADR2];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C3_ADR2];

set_property PACKAGE_PIN A15 [get_ports DDR4_C3_ADR3];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C3_ADR3];

set_property PACKAGE_PIN C14 [get_ports DDR4_C3_ADR4];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C3_ADR4];

set_property PACKAGE_PIN A14 [get_ports DDR4_C3_ADR5];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C3_ADR5];

set_property PACKAGE_PIN B14 [get_ports DDR4_C3_ADR6];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C3_ADR6];

set_property PACKAGE_PIN E13 [get_ports DDR4_C3_ADR7];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C3_ADR7];

set_property PACKAGE_PIN F13 [get_ports DDR4_C3_ADR8];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C3_ADR8];

set_property PACKAGE_PIN A13 [get_ports DDR4_C3_ADR9];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C3_ADR9];

set_property PACKAGE_PIN D14 [get_ports DDR4_C3_ADR10];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C3_ADR10];

set_property PACKAGE_PIN C13 [get_ports DDR4_C3_ADR11];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C3_ADR11];

set_property PACKAGE_PIN B13 [get_ports DDR4_C3_ADR12];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C3_ADR12];

set_property PACKAGE_PIN K16 [get_ports DDR4_C3_ADR13];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C3_ADR13];

set_property PACKAGE_PIN D15 [get_ports DDR4_C3_ADR14];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C3_ADR14];

set_property PACKAGE_PIN E15 [get_ports DDR4_C3_ADR15];

set_property IOSTANDARD SSTL12_DCI [get_ports DDR4_C3_ADR15];

set_property PACKAGE_PIN F15 [get_ports DDR4_C3_ADR16];

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Brand	Xilinx
Model	VCU1525
Category	Microcontrollers
Language	English

Xilinx VCU1525 User Manual

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