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Xilinx Zynq UltraScale+ User Manual

Xilinx Zynq UltraScale+
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Zynq UltraScale+ VCU TRD User Guide 10
UG1250 (v2019.1) May 29, 2019 www.xilinx.com
Chapter 1: Introduction
Audio Renderer pipeline to playback the audio frames through HDMI-TX, SDI-TX, DP,
and I2S-TX interfaces.
Transcode pipeline to transfer the file from the HOST machine to the client board
(zcu106) through PCIe XDMA bridge interface in the PL. The file is passed to the VCU
encoder and decoder block for transcoding. The transcoded file is written back to
HOST machine using the PCIe XDMA bridge interface read channel.
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Xilinx Zynq UltraScale+ Specifications

General IconGeneral
ManufacturerXilinx
ModelZynq UltraScale+
CategorySoC
Processor CoresQuad-core ARM Cortex-A53, Dual-core ARM Cortex-R5
FPGA FabricUltraScale+ FPGA
Memory InterfacesDDR4, DDR3, LPDDR3, LPDDR4
ConnectivityGigabit Ethernet, USB 3.0, SATA, PCIe
Video CodecsH.264
Power ConsumptionVaries depending on specific device configuration and usage
Operating TemperatureCommercial: 0°C to +85°C, Industrial: -40°C to +100°C

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