YOKOGAWA DL2700 Series User Manual

4
4 - 7
SM 700820-01E
PRINCIPLE OF THE OPERATION
ACQ Board Ass'y
Memory Board Ass'y
ACLADP
Multiplexer
ACLADP
Amplifire
A/D Converter Rate Reducer
ACLADP
ACQ Memory
ACLADP
FTL
STG
TVC
TCL
AFC
TRG Board Ass'y
Interleave Offset
Interleave Gain
Time Base
D
C
B
A
ACQ Memory
ACQ Memory
ACQ Memory
Comparator
Term Ass'y
from Rear
Control Signal
CH1
CH5
CH6
CH2
CH3
CH7
CH4
CH8
to Rear
Term Ass'y
TV Trigger
CH1 to CH8
×2
Trigger Logic
Buffer
to ACQ
to TRG
A
B
C
D
Board Ass'y
from Logic I/F
to TRG Board Ass'y
from TRG Board Ass'y
960 CPU
DRAM
960 CPU Board Ass'y
VRAM Video I/F
Video Board Ass'y
Printer I/F
Printer Board Ass'y
Power Unit
Power Unit
AC
AC
A
B
C
D
Rear
Term
Ass'y
Board Ass'y
Board
68k CPU
Backup RAM
Flash RAM
Key Controler
GPIB Controler
SCSI Controler
FDD Controler
68k CPU Board Ass'y
Logic I/F Board Ass'y
Mother Board Ass'y
DC
DC
Printer
MO Drive
FD Drive
Power Board Ass'y
LCD
TRIG OUT
EXT CLOCK IN
/EXT TRIG IN
SCSI
GPIB
VGA Video OUT
Key Board Ass'y
CAL OUT
∗
Ass'y
∗
∗
∗
∗
∗
∗
∗
∗
∗
∗
∗
Multiplexer
Amplifire
A/D Converter Rate Reducer
Multiplexer
Amplifire
A/D Converter Rate Reducer
Multiplexer
Amplifire
A/D Converter
Interleave Offset
Interleave Gain
Interleave Offset
Interleave Gain
Interleave Offset
Interleave Gain
from Logic I/F
Board Ass'y
∗
∗
from Logic I/F
Board Ass'y
from Logic I/F
Board Ass'y
from Logic I/F
Board Ass'y
Rate Reducer
Figure 4.2 Block diagram (digital section)
4.4 Functions of Each Gate Array

YOKOGAWA DL2700 Series Specifications

General

Brand	YOKOGAWA
Model	DL2700 Series
Category	Test Equipment
Language	English