eZ80
®
CPU
User Manual
UM007714-0908 CPU Instruction Set
244
LEA rr, IX+d
Load Effective Address
Operation
rr ← IX+d
Description
The
rr
operand is any of the multibyte CPU registers BC, DE, or HL. The CPU adds the
contents of the IX register to the signed displacement
d
and writes the sum to the multi-
byte
rr
register.
Condition Bits Affected
None.
Attributes
kk identifies either the BC, DE, or HL multibyte register and is assembled into one of the
opcodes indicated in Table 73.
Mnemonic Operand ADL Mode Cycle Opcode (hex)
LEA rr,IX+d X3ED, kk, dd
LEA.S rr,IX+d 1452, ED, kk, dd
LEA.L rr,IX+d 0449, ED, kk, dd
Table 73. Register and kk Opcodes for LEA rr, IX+d Instruction (hex)
Register kk
BC 02
DE 12
HL 22