ABB REL 551-C1*2.5 - Logic Diagram; Input and Output Signals

73
Time delayed residual overcurrent protection
(TEF)
Chapter 5
Current
3.4 Logic diagram
Figure 30: Simplified logic diagram for the residual overcurrent protection
3.5 Input and output signals
Table 83: Input signals for the TEF (TEF--) function block
Path in local HMI: ServiceReport/Functions/EarthFault/TimeDelayEF/FuncOutputs
99000204.vsd
Operation = ON
Def/NI/VI/EI/LOG
&
&
>1
EFCh
k
IN>
±Σ
300ms
t
1000ms
t
3Io>
t
tMin
&
t
t1
&
IMin
20%
50ms
t
TEF--TRIP
= Directional
100% FORWARD
60% REVERSE
3Iox
cos (φ-65)
EF3IoSTD
0.01Un
2fn
2fn
Direction
Option: Directional check
3Uo
TEF--BLOCK
&
&
&
&
&
TEF--TRSOTF
TEF--STFW
TEF--STRV
TEF--START
TEF--BC
TEF--BLKTR
3Io
>1
&
&
Signal Description
BLOCK Block of function
BLKTR Block of trip
BC Information on breaker position, or on breaker closing command