GES – Users Manual
Page 28 of 33
8. Switch Management Capabilities
The GES is based on a Marvell Prestera DX-167 sixteen port 10/100/1000 QoS Ethernet
Packet Processor IC. The data sheet for the Marvell parts can be accessed at
www.marvell.com. Access to the data sheet requires creating an account on the Marvell
web site. Aeronix cannot supply data sheets as they are proprietary to Marvell.
The following list is a sub-set of the capabilities of the Switch IC:
• Egress tagging/untagging - selectable per port or by 802.1Q VLAN ID
• Port Based VLANs - supported in any combination or 802.1 VLAN support for
4096 VIDs
• Port States and BPDU handling for spanning tree
• 802.1X Source MAC address authentication
• Quality of Service - switch architecture provides non-blocking switching in all
traffic environments
• Link Aggregation (802.3ad) - allows two or more links to be trunked to increase
the total bandwidth and provide a failsafe if one of the links fails
• A high speed, non-blocking, QoS switch fabric with support for four traffic classes
based on:
o Port
o IEEE 802.1p
o IPv4’s TOS or Diff-Serv
o IPv6’s Traffic Class
o 802.1Q VID
o DA MAC address
o SA MAC Address
• Back-pressure flow control on half-duplex ports
• Pause-frame flow control on full-duplex ports
• Lookup engine supports 16384 MAC address entries with learning and aging
• Auto-MDI/MDIX and polarity correction
The Management Processor in the GES is an ARM9 running at 96 MHz. It is directly
connected to a dedicated Ethernet port on the Switch IC. It is capable of running a
TCP/IP stack so that it can be an active participant on a network serviced by the GES.
Aeronix can create custom loads for this processor that will allow increased GES
management functionality and/or customer defined custom applications that would be
hosted on this processor.
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