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Agilent Technologies 33220A

Agilent Technologies 33220A
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273
Chapter 4 Remote Interface Reference
Status Reporting Commands
4
*CLS
Clear the event register in all register groups. This command also clears
the error queue and cancels a *OPC operation.
STATus:PRESet
Clear all bits in the Questionable Data enable register and the Standard
Operation enable register.
*PSC {0|1}
*PSC?
Power-On Status Clear. Clear the Standard Event enable register and
Status Byte condition register at power on (*PSC 1). When *PSC 0 is
in effect, these two registers are not cleared at power on. The default is
*PSC 1. The *PSC? query returns the power-on status clear setting.
Returns “0” (do not clear at power on) or “1” (clear at power on).
*OPC
Set the “Operation Complete” bit (bit 0) in the Standard Event register
after the previous commands have completed. When used with a bus-
triggered sweep or burst, you may have the opportunity to execute
commands after the *OPC command and before the “Operation Complete”
bit is set in the register.
Miscellaneous Status Register Commands

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