AIC Lynx - PCH Configuration

53
Chapter 4. BIOS Conguration SettingsLynx User Manual
4�4�11 PCH Conguration
PCH Configuration
DCI enable
(HDCIEN)
Enable Disable
DCI Auto Detect
Enable
Enable Disable
PCH Devices
PCH Server Error
Reporting Mode
(SERM)
Enable Disable
CLKRUN# logic Enable Disable
Serial IRQ Mode Queit Continuous
PCH state after G3 S0 S5 Last State
Port 80h
Redirection
LPC Bus PCI Mode
PCH Cross
Throttling
Enable Disable
PCH CRID Enable Disable
IO-APIC 24-119
RTE
Enable Disable
Pcie Pll SSC Enable Disable
PCI Express
Conguration
PCI Delay
Optimization
Enable Disable
Compliance Test
Mode
Enable Disable
PCI-E ASPM
Support (Global)
Per individual port L1 Only
CTO for Uplink x16
CTO for Uplink x8
40-50ms(spec 50us-50ms),40-50ms(spec 16ms-55ms),160-
170ms(spec 65ms-210ms),400-500ms(spec 260ms-
900ms),1.6-1.7s(spec 1s-3.5s),Disabled
MPL for Uplink x16
MPL for Uplink x8
MPL 128B MPL 256B MPL 512B
PCIE Clock Gating Enable Disable
PCH DMI ASPM Platform-POR ASPM L1 Disable
DMI Link Extended
Synch Control
Enable Disable
Stop and Scream Enable Disable
Expanded SPI TPM
Transaction Length
Enable
Enable Disable
Subtractive
Decode
Enable Disable
Subtractive Decode
Port#
Min=0, Max=7
PCIe Root Port
Function Swapping
Enable Disable
Max Read Request
Size
MRRS 128B MRRS 256B MRRS 512B
MRRS 1024B MRRS 2048 MRRS 4096