Aim MIL-STD-1553 - Page 67

MIL-STD-1553 Reference Manual
53
Chapter 2 - Library Administration and Initialization Functions
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The ‘virtual’ address the PMC board is temporarily be mapped to
Only used for PMC on AVC
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Used as input for functions AiVme429MapModule(),AiVme429UnmapModule() or
Ai429CheckModule(). For two PMC boards on one AVC-2 carrier, this contains
the configuration data of the first PMC board.
typedef struct {
TY_PCI_CONFIGSPACE_HEADER x_PCIConfHd;
TY_PCI_BAR_INFO x_PCIBarInfo[6];
AiUInt32 ul_PCITotalMemorySize;
AiUInt32 ul_PCIStartAddress;
AiUInt32 ul_A16Address;
AiUInt8 uc_VmeHandleCount;
AiUInt busNo;
AiUInt8 deviceNo;
AiUInt8 funcNo;
} TY_PCI_INFO;
TY_PCI_CONFIGSPACE_HEADER x_PCIConfHd
typedef struct {
AiUInt16 uw_DeviceID; // Device ID
AiUInt16 uw_VendorID; // Vendor ID
AiUInt16 uw_Status; // PCI status register
AiUInt16 uw_Command; // PCI command register
AiUInt32 ul_ClassCode_RevID; // PCI Class code / Revision ID
AiUInt8 uc_Bist; // PCI BIST register
AiUInt8 uc_HeaderType; // PCI header type
AiUInt8 uc_LatencyTimer; // PCI latency timer
AiUInt8 uc_CacheLineSize; // PCI cache line size
AiUInt32 ul_BAR[6]; // Base address registers
AiUInt32 ul_CardbusCisPtr; // Card Bus CIS Ptr
AiUInt16 uw_SubsystemID; // Subsystem ID
AiUInt16 uw_SubsystemVendID; // Subsystem Vendor ID
AiUInt32 ul_ExpRomBaseAddr; // Expansion ROM Base Address
AiUInt16 uw_Reserved1;
AiUInt8 uc_Reserved2;
AiUInt8 uc_CapabilitiesPtr; // Capabilities Ptr
AiUInt32 ul_Reserved3;
AiUInt8 uc_MaxLat; // Max latency
AiUInt8 uc_MinGnt; // Min grant
AiUInt8 uc_intr_pin; // Interrupt pin
AiUInt8 uc_intr_line; // Interrupt Line
} TY_PCI_CONFIGSPACE_HEADER;
typedef struct {
AiUInt32 ul_size; // Requested size of the BAR reg
AiUInt32 ul_BarBaseAddress; // PCI Base Address of BAR reg
} TY_PCI_BAR_INFO;
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As px_PCI_Info1, but it contains the configuration data of the second PMC board
of an AVC-2 carrier. For all other boards, this value may be ignored.
Return Value
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.
.