AMD Xilinx ZCU670 - Page 6

○ Micro-SD card
○ USB-to-JTAG bridge
○ PC4 2x7 2 mm JTAG pod at cable header
• Clocks
○ SI5381 (various frequencies)
For addional details on this clock, see Table 17, Table 18, and SI5381A 10 Independent
Output Any-Frequency Clock Generator U43.
○ CLK104 (various frequencies):
Oponal for DFE. Contact factory for availability.
- CLK104_PL_CLK
- CLK104_PL_SYSREF
- CLK104_AMS_SYSREF
- CLK104_DAC_REFCLK (direct connect SSMP)
○ 8A34001 IEEE 1588, Synchronous Ethernet (SyncE), and eCPRI clock (various frequencies)
For addional details on this clock, see Table 17, Table 18, and SI5381A 10 Independent
Output Any-Frequency Clock Generator U43.
○ PS_REF_CLK 33.333333...(33 + 1/3 MHz)
○ ADC_CLK_226 (direct connect SSMP)
For addional details on this clock, see Table 17, Table 18, and Programmable User SI570
Clocks.
○ DAC_CLK_228 (direct connect SSMP)
○ USER_MGT_SI570 (default 156.25 MHz)
For addional details on this clock, see Table 17, Table 18, and Programmable User SI570
Clocks.
○ USER_SI570_C0 (default 300 MHz)
For addional details on this clock, see Table 17, Table 18, and Programmable User SI570
Clocks.
○ User SMA clocks
For more informaon, see User SMA Clocks.
• PS DDR4 4 GB 64-bit SODIMM
• PL DDR4 C0 I/F 2 GB 32-bit component (4x8-bit)
Chapter 1: Introduction
UG1532 (v1.0) March 30, 2022 www.xilinx.com
ZCU670 Board User Guide 6
Send Feedback