P4M900-M7 FE/P4M890-M7 FE
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PCI Delay Transaction
The chipset has an embedded 32-bit posted write buffer to support delay
transactions cycles. Select Enabled to support compliance with PCI
specif icat ion.
The Choices: Enabled (default), Disabled.
VLink mode selection
T his item allows you to select Vlink mode.
The Choices: By Auto (default), Mode 0 , Mode 1, Mode 2, Mode 3, Mode 4.
VLink 8X Support
This item allows you to enable or disable VLink 8X support.
The Choices: Enabled (default), Disabled.
VIA PWR Management
The Choices: Enabled (default), Disabled.
Memory Hole
You can reserve this area of system memory for ISA adapter ROM. W hen this
area is reserved it cannot be cached. Check the user information of peripherals
that need to use this area of s ystem memory for the memory req uirements.
The Choices: Disabled (default), 15M-16M.
System BIOS Cacheable
Selec ting the “Enabled” option allo ws caching of the s ystem BIOS ROM at
F0000h-FFFFFh, which is able to improve the system performance. However,
any programs that attempts to write to this memory block will cause conflicts
and result in system errors.
The Choices: Enabled (default), Disabled.
Top Performanc e
The Choices: Disabled (default), Enabled.
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