Bruker AQS - 4 Condensed Technical Description; Architecture; Block Diagram of CCU

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(98/12/10)
4. Condensed technical Description
4. 1. Architecture
The CCU is build out of three Units :
 Processor .
 Memory
 L_bus incorporating
1. The ETHERNET and the Fast–ETHERNET interface, which can
be a Master on the L–bus and can access only the Memory.
2. The VME bus interface, which can be a Master on the L–bus and
can access only the Memory.
3. Slave devices which are accessible only by the CPU.
The communication between these Sections is provided by Interconnect Interface. This is
a CCU’s Internal Interface resolving the arbitration, buffering and interleaving tasks
between the Sections. Each Section is attached to the Interconnect by means of Ports.
Each Port contains following elements:
 Data exchanger ( De )
 Byte Enable exchanger ( BEe )
 Address exchanger ( Ae )
 Control logic.
4. 1. 1. Block Diagram of CCU
Figure 15: Block diagram CU09/10