Dräger Babylog 8000 - Page 45

Dräger Medical AG & Co. KGaA 6173.3
All rights reserved. Copyright reserved.
_ _Printed on_18.05.05_F61733XXT01.fm
43
Function description Babylog 8000
Fig. 19: Block diagram of the Monitoring PCB
Block diagram of the Watchdog PCB of the Monitoring PCB (in new boards the Watchdog PCB is
integrated into the Monitoring PCB).
Digital bus 68000
Bus interface
DTACKQ
Control bus
Adress bus
Data bus
INTQ
DTACKQ
generator
Z80-Bus
EPROM
64 k
RAM
8 k
Dual-
Port-
RAM
4 MHz
Z 80
CPU
Timer
Watchdog
Control bus
Adress bus
I/O connections
Analog Input
Digital Input
S & H
(Filter)
PIO
A
D
PIO
Adress
decoder
Adress
decoder
Watch dog
PCB
Status
display