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Eaton EDR-5000 - Page 818

Eaton EDR-5000
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EDR-5000 IM02602007E
Available Gates (Operators)
Within the Logic Equation, the following Gates can be used.
Input Signals
The User can assign up to four Input signals (from the assignment list) to the inputs of the gate.
As an option, each of the four input signals can be inverted (negated).
Timer Gate (On Delay and Off Delay)
The output of the gate can be delayed. The User has the option to set an On and an Off delay.
Latching
The timer issues two signals: an unlatched and a latched signal. The latched output can optionally be inverted.
In order to reset the latched signal, the User has to assign a reset signal from the assignment list. Optionally, the reset
signal can also be inverted.
If no »
Reset Latched«
signal is assigned, then the »LATCH OUT «signal will be identical with the »TIMER OUT « signal.
www.eaton.com 818
AND
OR
AND
OR
AND
NAND
OR
NOR
Gate

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