2-9
3. Control Signals
There are two ways for the CPU to control the transmitting/receiving circuits. One is, the
CPU directly sends signals to them, and the other is, the CPU sends serial data to each
circuit board and there the data are converted to parallel data that controls each circuit.
The CPU controls TX/RX board and PA/FIL board by sending serial-data from P40:
DATA, and DDS circuit in TX/RX from P90: DDS DATA.
P40
DATA
P41
P46
CLK
ST TX/RX
P47
ST PA/FIL
P45
P42
P43
P90
P91
P44
DDS CLK
DDS DATA
DDS LOAD
LOAD
S.DATA
S.CLK
ST SYN
PLL 1 ENB
PLL 3 ENB
T
Sout
Sin
L
T
Sout
Sin
L
T
Sout
Sin
L
T
Sout
Sin
L
CLK
LD
ENB
Din
CLK
LD
ENB
Din
Q1
2
3
4
5
6
7
8
SP OFF
RX AF OFF
MIC&TONE
LINE ON
MIC ON
-6dB
NB OFF
TEST
Q1
2
3
4
5
6
7
8
INTERCOM
AGC OFF
AGC FAST
RX H3E
TX H3E
FIL W
FIL N
FIL M
Q1
2
3
4
5
6
7
8
LPF 6
LPF 5
LPF 4
LPF 3
LPF 2
LPF 1
Q1
2
3
4
5
6
7
8
BAMD 1
BAND 2
BAND 3
BAND 4
H/L
DDS RESET
(DDS)
U503 U502 U504
(3Lo)
(1Lo)(1Lo)
U501
• U11 (M54972FP)
• U12 (M54972FP)
• U501 (AD7008AP20)
• U502 (MC145170D1)
• U503 (M54972FP)
• U504 (MC145170D1)
U11
U12
U7 (M54972P)
PA/FIL (05P0667)
TX/RX (05P0666)
U6
CPU (05P0665)
HD6475328F10
or
HD6435328F
Figure 2-3 Serial Data Lines
Serial-data transmission has an advantage of smaller number of control lines than paral-
lel-data transmission. However, the signals T/R, MUTE, EXC ON, PA ON, TX KEYED,
and BK ON are directly sent as parallel data from CPU, because these signals need pre-
cisely matched timing with their object circuits.
Whereas DATA CLK for the serial-data is periodically sent from the CPU, ST (LATCH)
signal is sent to control the circuit (M54972P) when the data are changed by key opera-
tions.
The transmission timing of the serial-data is shown in Figure 2-4 and the functions of the
serial control signals are listed on Table 2-3.
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