Table of Figures
Figure 1: Functional Overview 11
Figure 2: Hardware architecture 30
Figure 3: Exploded view of IED 31
Figure 4: Front panel (60TE) 33
Figure 5: HMI panel 34
Figure 6: Rear view of populated case 37
Figure 7: Terminal block types 38
Figure 8: Rear connection to terminal block 39
Figure 9: Main processor board 40
Figure 10: Power supply board 41
Figure 11: Power supply assembly 42
Figure 12: Power supply terminals 43
Figure 13: Watchdog contact terminals 44
Figure 14: Rear serial port terminals 45
Figure 15: Input module - 1 transformer board 45
Figure 16: Input module schematic 46
Figure 17: Transformer board 47
Figure 18: Input board 48
Figure 19: Standard output relay board - 8 contacts 49
Figure 20: IRIG-B board 50
Figure 21: Fibre optic board 51
Figure 22: Rear communication board 52
Figure 23: Ethernet board 52
Figure 24: Redundant Ethernet board 54
Figure 25: Software Architecture 60
Figure 26: Frequency Response (indicative only) 65
Figure 27: Navigating the HMI 72
Figure 28: Default display navigation 74
Figure 29: IEC 60255 IDMT curves 91
Figure 30: IEC standard and very inverse curves 94
Figure 31: IEC Extremely inverse and IEEE moderate inverse curves 94
Figure 32: IEEE very and extremely inverse curves 95
Figure 33: Principle of protection function implementation 96
Figure 34: Non-directional Overcurrent Logic diagram 99
Figure 35: Directional Overcurrent Logic diagram (Phase A shown only) 101
Figure 36: Typical distribution system using parallel transformers 102
Figure 37: Typical ring main with associated overcurrent protection 103
Figure 38: Modification of current pickup level for voltage controlled overcurrent protection 105
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