HEIDENHAIN TNC 426 PB - Operand Addressing (Byte, Word, Double Word)

December 2001 Operands 7 – 15
7.2.2 Operand Addressing (Byte, Word, Double Word)
The memory for operands B (8 bits), W (16 bits), D (32 bits) is only 8 bits wide.
Since the operands can be 8, 16 or 32 bits wide, an overlapping of the memory
area will occur, which you must take into account when addressing memory:
During byte addressing every address, during word addressing every second
address, and during double-word addressing every fourth address from 0 to
4092 is accessible. The address parameter indicates the high byte of the word
address (W) and the highest byte of the double-word address.
Markers, timers and counters are addressed with the corresponding code
letters M, T or C followed by the operand number (e.g. M500, T7, C18).
Double word Word Byte Memory Word address Double-word
address
D0 W0 B0 8 bits High byte Highest byte
B1 8 bits Low byte
W2 B2 8 bits High byte
B3 8 bits Low byte Lowest byte
D4 W4 B4 8 bits High byte
B5 8 bits Low byte
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D1020 W1020 B1020 8 bits High byte Highest byte
B1021 8 bits Low byte
W1022 B1022 8 bits High byte
B1023 8 bits Low byte Lowest byte