HP 54501A - Page 72

HP 54501A SERVICE
and
the HP-113 in accordance
with IEEE 488
standards . The 75160
is an 8-bit data buffer
and the 75162
is an 8-bit control line buffer
.
The HP-IB is a 24-pin shielded
cable carrying
8 data lines, 8 control lines,
7 system grounds,
and 1 chassis ground .
The keypad/RPG
interface is interpreted as an
8 X 8 matrix
with 8 row lines connected
through
an
open-collector
buffer to the 8 lower
address lines and
the 8 column lines connec-
ted through a
tri-state buffer to the 8 lower
data lines .
The acquisition
interface consists of 16 func-
tional lines : 3 data latch controls, 4 logic trig-
ger functions, 2 DAC functions, 3 timebase
functions, and four
unused selects . Other in-
terface
circuitry is made up of buffers for ad-
dress and
data lines and five latched data lines
for control signals to the Timebase and Logic
Trigger and the calibration outputs to the HP
54501A rear panel . The CPU provides 3
clocks to acquisition
via the interface : 1 .5 kHz
to rear panel
DC Calibrator Output, 2 .5 MHz
for dither, and 20 MHz to D/A Converter and
Probe Compensation AC Calibrator Output .