Chapter 1
HP Integrity rx8640 and HP 9000 rp8440 Server Overview
Detailed Server Description
33
SBA link protocol into “ropes.” A rope is defined as a high-speed, point-to-point data bus. The SBA can
support up to 16 of these high-speed bidirectional rope links for a total aggregate bandwidth of approximately
11.5 GB/s.
There are LBA chips on the PCI-X backplane that act as a bus bridge, supporting either one or two ropes for
PCI-X 133 MHz slots and the equivalent bandwidth of four ropes for PCI-X 266 MHz slots. Each LBA acts as
a bus bridge, supporting one or two ropes and capable of driving 33 MHz or 66 MHz for PCI cards. The LBAs
can also drive at 66 MHz or 133 MHz for PCI-X mode 1 cards, and at 266 MHz for PCI-X mode 2 cards
installed in mode 2 capable slots. When cell board 2 and cell board 3 are present, the cell boards attach to
their own associated SBA and LBA chips on the PCI-X board in the Server Expansion Unit.
Figure 1-12 PCI-X Board to Cell Board Block Diagram
Table 1-6 and Table 1-7 on page 34 list the mapping of PCI-X slots to boot paths. The cell column refers to the
cell boards installed in the server.
Table 1-6 PCI-X Slot Boot Paths Cell 0
Cell PCI Slot Ropes Path
0 1 8/9 0/0/8/1/0
0 2 10/11 0/0/10/1/0
0 3 12/13 0/0/12/1/0
0 4 14/15 0/0/14/1/0
0 5 6/7 0/0/6/1/0
0 6 4/5 0/0/4/1/0
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