• AMP modes Advanced ECC, Online Spare, and Mirrored Memory have further requirements
beyond the ones listed here. For additional memory configuration requirements, see the
corresponding AMP sections:
◦ Advanced ECC memory population guidelines (“Advanced ECC memory population
guidelines” (page 39))
◦ Online Spare memory population guidelines (“Online Spare memory population
guidelines” (page 39))
◦ Mirrored Memory population guidelines (“Mirrored Memory population guidelines” (page
40))
Memory cartridge population guidelines
This server contains eight memory cartridge slots in each processor memory drawer.
Observe the following guidelines:
• Memory must be loaded in quads, with a pair of DIMMs in each memory cartridge for a
corresponding processor.
Upper processor memory board is shown on the left. Lower processor memory board is shown on
the right.
• Memory is only accessible to the system if the associated processor is installed. Do not install
memory cartridges in cartridge slots without the corresponding processor installed.
• Two DIMM populated memory cartridges are required per processor.
• To maximize performance in multi-processor configurations, distribute the total memory capacity
evenly across all processors.
NOTE: Be sure you are using the correct spare part number when replacing the memory
cartridge. The server ships with one of two different memory cartridges, which are not
interchangeable.
Memory subsystem architecture
The Intel® Xeon™ 7500 processor memory architecture is designed to take advantage of multiple
stages of memory interleaving to reduce latency and increase bandwidth.
Each Intel Xeon 7500 processor contains two memory controllers as shown in the illustration below.
Each memory controller has two SMI buses operating in Lockstep mode. Each SMI bus connects
to a memory buffer. The buffer converts SMI to DDR3 and expands the memory capacity of the
36 Removal and replacement procedures
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