Chapter 2. Architecture and technical overview 41
2.1 The IBM POWER7+ processor
The IBM POWER7+ processor represents a leap forward in technology achievement and
associated computing capability. The multi-core architecture of the POWER7+ processor has
been matched with innovation across a wide range of related technologies to deliver leading
throughput, efficiency, scalability, and reliability, availability, and serviceability (RAS).
Although the processor is an important component in delivering outstanding servers, many
elements and facilities must be balanced on a server to deliver maximum throughput. As with
previous generations of systems based on POWER processors, the design philosophy for
POWER7+ processor-based systems is one of system-wide balance in which the POWER7+
processor plays an important role.
In many cases, IBM is innovative to achieve required levels of throughput and bandwidth.
Areas of innovation for the POWER7+ processor and POWER7+ processor-based systems
include (but are not limited to) the following items:
On-chip L3 cache implemented in embedded dynamic random access memory (eDRAM)
Cache hierarchy and component innovation
Advances in memory subsystem
Advances in off-chip signaling
Advances in I/O cards throughput and latency
Advances in RAS features, as power-on reset and L3 cache dynamic column repair
The superscalar POWER7+ processor design also provides a variety of other capabilities:
Binary compatibility with the prior generation of POWER processors
Support for PowerVM virtualization capabilities, including PowerVM Live Partition Mobility
to and from POWER6 and POWER6+ processor-based systems
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