Chapter 4. Continuous availability and manageability 175
4.2.8 POWER7 I/O chip freeze behavior
The POWER7 I/O chip implements a “freeze behavior” for uncorrectable errors borne on the
GX+ bus and for internal POWER7 I/O chip errors detected by the POWER7 I/O chip. With
this freeze behavior, the chip refuses I/O requests to the attached I/O, but does not check
stop the system. This allows systems with redundant I/O to continue operating without an
outage instead of system checkstops seen in earlier chips, such as the POWER5 I/O chip that
is used on POWER6 processor-based systems.
4.3 Serviceability
IBM Power Systems design considers both IBM and client needs. The IBM Serviceability
Team enhanced the base service capabilities and continues to implement a strategy that
incorporates best-of-its-kind service characteristics from diverse IBM systems offerings.
Serviceability includes system installation, system upgrades and downgrades (MES), and
system maintenance and repair.
The goal of the IBM Serviceability Team is to design and provide the most efficient system
service environment that includes the following benefits:
Easy access to service components, design for customer setup (CSU), customer installed
features (CIF), and customer-replaceable units (CRU)
On demand service education
Error detection and fault isolation (ED/FI)
First-failure data capture (FFDC)
An automated guided repair strategy that uses common service interfaces for a converged
service approach across multiple IBM server platforms
By delivering on these goals, IBM Power Systems servers enable faster and more accurate
repair and reduce the possibility of human error.
Client control of the service environment extends to firmware maintenance on all of the
POWER processor-based systems. This strategy contributes to higher systems availability
with reduced maintenance costs.
This section provides an overview of the progressive steps of error detection, analysis,
reporting, notification, and repairing that are found in all POWER processor-based systems.
4.3.1 Detecting
The first and most crucial component of a solid serviceability strategy is the ability to
accurately and effectively detect errors when they occur. Although not all errors are a
guaranteed threat to system availability, those that go undetected can cause problems
because the system does not have the opportunity to evaluate and act if necessary. POWER
processor-based systems employ IBM System z® server-inspired error detection
mechanisms that extend from processor cores and memory to power supplies and hard
drives.
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