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Infineon TriCore TC1.6E - Page 168

Infineon TriCore TC1.6E
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TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set
V1.0 2013-07
User Manual (Volume 2) 3-121
if (D[b][15:0] <= D[b][31:16]) AND (D[b][15:0] < E[d][47:32]) then {
E[c][47:32] = D[b][15:0];
E[c][31:16] = E[d][15:0];
} else if (D[b][31:16] < D[b][15:0]) AND (D[b][31:16] < E[d][47:32]) then {
E[c][47:32] = D[b][31:16];
E[c][31:16] = E[d][15:0]+1;
} else {
E[c][47:32] = E[d][47:32];
E[c][31:16] = E[d][31:16];
}
For all index additions, on overflow: wrapping, no trap
If the 1st compare value and 2nd compare value and current minimum value are the same, the priority select is:
current minimum is the highest priority then 1st compare value and 2nd compare value is in the lowest priority.
Status Flags
Examples
ixmin e10, e2, d0
ixmin.u e14, e2, d7
See Also
IXMAX
C Not set by these instructions.
V Not set by these instructions.
SV Not set by these instructions.
AV Not set by these instructions.
SAV Not set by these instructions.

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