Infineon TriCore TC1.6E - LT.H - Less than Packed Half-Word; LT.HU - Less than Packed Half-Word Unsigned

TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set
V1.0 2013-07
User Manual (Volume 2) 3-181
LT.H
Less Than Packed Half-word
LT.HU
Less Than Packed Half-word Unsigned
Description
Compare each half-word of data register D[a] with the corresponding half-word of D[b]. In each case, if the value
of the half-word in D[a] is less than the value of the corresponding half-word in D[b], set all bits of the corresponding
half-word of D[c] to one; otherwise clear all the bits. Operands are treated as signed (LT.H) or unsigned (LT.HU)
16-bit integers.
LT.HD[c], D[a], D[b] (RR)
D[c][31:16] = (D[a][31:16] < D[b][31:16]) ? 16’hFFFF : 16’h0000;
D[c][15:0] = (D[a][15:0] < D[b][15:0]) ? 16’hFFFF : 16’h0000;
LT.HUD[c], D[a], D[b] (RR)
D[c][31:16] = (D[a][31:16] < D[b][31:16]) ? 16’hFFFF : 16’h0000; // unsigned
D[c][15:0] = (D[a][15:0] < D[b][15:0]) ? 16’hFFFF : 16’h0000; // unsigned
Status Flags
Examples
lt.h d3, d1, d2
lt.hu d3, d1, d2
See Also
EQ.B, EQ.H, EQ.W, LT.B, LT.BU, LT.W, LT.WU
C Not set by these instructions.
V Not set by these instructions.
SV Not set by these instructions.
AV Not set by these instructions.
SAV Not set by these instructions.
31
c
28 27
72
H
20 19
-
18 17
-
16 15
b
12 11
a
8 7
0B
H
0
31
c
28 27
73
H
20 19
-
18 17
-
16 15
b
12 11
a
8 7
0B
H
0