Infineon TriCore TC1.6E - ABSDIF.B - Absolute Value of Difference Packed Byte; ABSDIF.H - Absolute Value of Difference Packed Half-Word

TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set
V1.0 2013-07
User Manual (Volume 2) 3-6
ABSDIF.B
Absolute Value of Difference Packed Byte
ABSDIF.H
Absolute Value of Difference Packed Half-word
Description
Compute the absolute value of the difference between the corresponding bytes (ABSDIF.B) or half-words
(ABSDIF.H) of D[a] and D[b], and put each result in the corresponding byte or half-word of D[c]. The operands are
treated as signed, 8-bit or 16-bit integers.
The overflow condition is calculated for each byte (ABSDIF.B) or half-word (ABSDIF.H) of the packed register.
ABSDIF.BD[c], D[a], D[b] (RR)
result_byte3 = (D[a][31:24] > D[b][31:24]) ? (D[a][31:24] - D[b][31:24]) : (D[b][31:24] - D[a][31:24]);
result_byte2 = (D[a][23:16] > D[b][23:16]) ? (D[a][23:16] - D[b][23:16]) : (D[b][23:16] - D[a][23:16]);
result_byte1 = (D[a][15:8] > D[b][15:8]) ? (D[a][15:8] - D[b][15:8]) : (D[b][15:8] -D[a][15:8]);
result_byte0 = (D[a][7:0] > D[b][7:0]) ? (D[a][7:0] - D[b][7:0]) : (D[b][7:0] - D[a][7:0]);
D[c] = {result_byte3[7:0], result_byte2[7:0], result_byte1[7:0], result_byte0[7:0]};
ABSDIF.HD[c], D[a], D[b] (RR)
result_halfword1 = (D[a][31:16] > D[b][31:16]) ? (D[a][31:16] - D[b][31:16]) : (D[b][31:16] - D[a][31:16]);
result_halfword0 = (D[a][15:0] > D[b][15:0]) ? (D[a][15:0] - D[b][15:0]) : (D[b][15:0] - D[a][15:0]);
D[c] = {result_halfword1[15:0], result_halfword0{15:0]};
Status Flags
C Not set by these instructions.
VABSDIF.B
ov_byte3 = (result_byte3 > 7F
H
) OR (result_byte3 < -80
H
);
ov_byte2 = (result_byte2 > 7F
H
) OR (result_byte2 < -80
H
);
ov_byte1 = (result_byte1 > 7F
H
) OR (result_byte1 < -80
H
);
ov_byte0 = (result_byte0 > 7F
H
) OR (result_byte0 < -80
H
);
overflow = ov_byte3 OR ov_byte2 OR ov_byte1 OR ov_byte0;
if (overflow) then PSW.V = 1 else PSW.V = 0;
ABSDIF.H
ov_halfword1 = (result_halfword1 > 7FFF
H
) OR (result_halfword1 < -8000
H
);
ov_halfword0 = (result_halfword0 > 7FFF
H
) OR (result_halfword0 < -8000
H
);
overflow = ov_halfword1 OR ov_halfword0;
if (overflow) then PSW.V = 1 else PSW.V = 0;
SV if (overflow) then PSW.SV = 1 else PSW.SV = PSW.SV;
31
c
28 27
4E
H
20 19
-
18 17
-
16 15
b
12 11
a
8 7
0B
H
0
31
c
28 27
6E
H
20 19
-
18 17
-
16 15
b
12 11
a
8 7
0B
H
0