TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set
V1.0 2013-07
User Manual (Volume 2) 3-2
ABS
Absolute Value
Description
Put the absolute value of data register D[b] in data register D[c]: If the contents of D[b] are greater than or equal
to zero then copy it to D[c], otherwise change the sign of D[b] and copy it to D[c].
The operands are treated as signed 32-bit signed integers.
ABSD[c], D[b] (RR)
result = (D[b] >= 0) ? D[b] : (0 - D[b]);
D[c] = result[31:0];
Status Flags
Examples
abs d3, d1
See Also
ABSDIF, ABSDIFS, ABSS
C Not set by this instruction.
V overflow = (result > 7FFFFFFF
H
) OR (result < -80000000
H
);
if (overflow) then PSW.V = 1 else PSW.V = 0;
SV if (overflow) then PSW.SV = 1 else PSW.SV = PSW.SV;
AV advanced_overflow = result[31] ^ result[30];
if (advanced_overflow) then PSW.AV = 1 else PSW.AV = 0;
SAV if (advanced_overflow) then PSW.SAV = 1 else PSW.SV = PSW.SV;
31
c
28 27
1C
H
20 19
-
18 17
-
16 15
b
12 11
-
8 7
0B
H
0
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