Infineon TriCore TC1.6E - ABSS.H - Absolute Value Packed Half-Word with Saturation

TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set
V1.0 2013-07
User Manual (Volume 2) 3-11
ABSS.H
Absolute Value Packed Half-word with Saturation
Description
Put the absolute value of each byte or half-word in data register D[b] in the corresponding byte or half-word of data
register D[c]. The operands are treated as signed 8-bit or 16-bit integers, with saturation on signed overflow. The
overflow condition is calculated for each byte or half-word of the packed register. Overflow occurs only if
D[b][31:16] or D[b][15:0] has the maximum negative value of 8000
H
and the saturation yields 7FFF
H
.
ABSS.HD[c], D[b] (RR)
result_halfword1 = (D[b][31:16] >= 0) ? D[b][31:16] : (0 - D[b][31:16]);
result_halfword0 = (D[b][15:0] >= 0) ? D[b][15:0] : (0 - D[b][15:0]);
D[c] = {ssov(result_halfword1, 16), ssov(result_halfword0, 16)};
Status Flags
Examples
abss.h d3, d1
See Also
ABS.B, ABS.H, ABSDIF.B, ABSDIF.H, ABSDIFS.H
C Not set by this instruction.
V ov_halfword1 = (result_halfword1 > 7FFF
H
) OR (result_halfword1 < -8000
H
);
ov_halfword0 = (result_halfword0 > 7FFF
H
) OR (result_halfword0 < -8000
H
);
overflow = ov_halfword1 OR ov_halfword0;
if (overflow) then PSW.V = 1 else PSW.V = 0;
SV if (overflow) then PSW.SV = 1 else PSW.SV = PSW.SV;
AV aov_halfword1 = result_halfword1[15] ^ result_halfword1[14];
aov_halfword0 = result_halfword0[15] ^ result_halfword0[14];
advanced_overflow = aov_halfword1 OR aov_halfword0;
if (advanced_overflow) then PSW.AV = 1 else PSW.AV = 0;
SAV if (advanced_overflow) then PSW.SAV = 1 else PSW.SAV = PSW.SAV;
31
c
28 27
7D
H
20 19
-
18 17
-
16 15
b
12 11
-
8 7
0B
H
0