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Integra DTR-7.9 Service Manual

Integra DTR-7.9
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MICROPROCESSOR TERMINAL DESCRIPTIONS -2
TX-SR806/SA806
Q1016: MPD70F3746
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Pin Name
Pin No.
I/O
Active
Description
DSPCLK
MUT_RX
RST_RX
CECOUT
CECIN
SCL_TX
SDA_TX
EXPCLK
XMRXD
XMTXD
SRTXD
SRRXD
SRRST
INT_TX
RST_TX
SYSOUT
PLLVSWSCL
PLLVSELSDA
FLDSDO
FLDCLK
FSI
FSO
FCLK
SYSIN
RDSCLK
POFF2
FLDRST
FLDCS
FLD2CS
EXPLAT
EXPOE
SD
STEREO
DSP1BUSY
HS
DSP1NIC
DSP1DEC
DSP1CS
DSP1RST
DSP2BUSY
DSP2CS
DSP2RST
DIRINT
DIRCLK
DIRCS
DIRRST
DACCS
DACRST
SEC1H
SWMUT
O
I
O
O
I
O
I/O
O
I
O
O
I
O
I
O
O
O
I/O
O
O
I
O
I
I
I
I
O
O
O
O
O
I
I
I
O
I
I
O
O
I
O
O
I
O
O
O
O
O
O
O
CLK
H
L
L
L
CLK
H
CLK
L
L
L
L
H
L
L
H
CLK
H
H
CLK
H
H
CLK
H
CLK
L
L
L
L
H
H
L
L
H
H
H
H
L
L
H
L
L
H
CLK
L
L
L
L
H
H
DSP colck output.
RXMUTE signal input from SII9135.
Reset control output to SII9135/SII9185.
HDMI CEC output.
HDMI CEC input.
SII9134 clock output.
SII9134 data input/output.
Clock output to Expander chip Q1021.
XM data input.
XM data output.
SIRIUS UART data output.
SIRIUS UART data input.
SIRIUS reset control output.
INT signal input from SII9134.
Reset control output to SII9134.
RI output.
Clock output to Tuner Unit/Video Switch IC.
Data input/output from/to Tuner Unit/Video Switch IC.
Data output to FL Driver M66005.
Clock output to FL Driver M66005.
Data input from Flash Writer.
Data output to Flash Writer.
Clock input from Flash Writer.
RI input.
RDS clock input.
Power down/resume (P-OFF2) detecting input.
Reset control output to FL Driver M66005.
Chip selecting signal to FL Driver1 M66005.
Chip selecting signal to FL Driver2 M66005.
Latch output to Expander chip Q1021.
Control output to Expander chip Q1021.
FM/AM Tuned detecting input.
FM STREO detecting input.
1st DSP’s BUSY detecting input.
Hand-shake output to Flash Writer.
1st DSP’s status change detecting input.
1st DSP’s decoding success detecting input.
1st DSP’s chip selecting output.
1st DSP’s reset control output.
2nd DSP’s BUSY detecting input.
2nd DSP’ chip selecting output.
2nd DSP’s reset control output.
DIR/CODEC’s UNLOCK detecting input.
DIR/CODEC’s clock output.
DIR/CODEC’s chip selecting output.
DIR/CODEC’s reset control output.
CS4382A chip selecting output.
DAC reset control output.
Power supply voltage switch control output for the power amplifier stage.
Subwoofer ch mute control output.
w
w
w
.
x
i
a
o
y
u
1
6
3
.
c
o
m
Q
Q
3
7
6
3
1
5
1
5
0
9
9
2
8
9
4
2
9
8
T
E
L
1
3
9
4
2
2
9
6
5
1
3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
TEL 13942296513 QQ 376315150 892498299
http://www.xiaoyu163.com
http://www.xiaoyu163.com

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Integra DTR-7.9 Specifications

General IconGeneral
BrandIntegra
ModelDTR-7.9
CategoryReceiver
LanguageEnglish

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