System Event Log Troubleshooting Guide for EPSD
Platforms Based on Intel
®
Xeon
®
Processor E5 4600/2600/2400/1600/1400 Product Families
Processor Subsystem
Revision 1.1 Intel order number G90620-002 61
6.2 Catastrophic Error Sensor
When the Catastrophic Error signal (CATERR#) stays asserted, it is a sign that something serious has gone wrong in the hardware.
The BMC monitors this signal and reports when it stays asserted.
Table 49: Catastrophic Error Sensor Typical Characteristics
Event Direction and
Event Type
[7] Event direction
0b = Assertion Event
1b = Deassertion Event
[6:0] Event Type = 03h (Digital Discrete)
[7:6] – 10b = OEM code in Event Data 2
[5:4] – 10b = OEM code in Event Data 3
[3:0] – Event Trigger Offset = 1h (State Asserted)
Event Data 2 values as described in Table 50.
Bitmap of the CPU that causes the system CATERR.
[0]: CPU1
[1]: CPU2
[2]: CPU3
[3]: CPU4
Note: If more than one bit is set, the BMC cannot
determine the source of the CATERR.
Table 50: Catastrophic Error Sensor – Event Data 2 Values – Next Steps
1. Cross test the processors.
2. Replace the processors depending on the results of the test.