Memory Subsystem
System Event Log Troubleshooting Guide for EPSD
Platforms Based on Intel
®
Xeon
®
Processor E5 4600/2600/2400/1600/1400 Product Families
70 Intel order number G90620-002 Revision 1.1
7. Memory Subsystem
Intel
®
servers report memory errors, status, and configuration in the SEL.
7.1 Memory RAS Configuration Status
A Memory RAS Configuration Status event is logged after an AC power-on occurs, only if any RAS Mode is currently configured, and
only if RAS Mode is successfully initiated.
This is to make sure that there is a record in the SEL telling what the RAS Mode was at the time that the system started up. This is
only logged after AC power-on, not DC power-on.
The Memory RAS Configuration Status Sensor is also used to log an event during POST whenever there is a RAS configuration
error. This is a case where a RAS Mode has been selected but when the system boots, the memory configuration cannot support the
RAS Mode. The memory configuration fails, and operates in Independent Channel Mode.
In the SEL record logged, the ED1 Offset value is “RAS Configuration Disabled”, and ED3 contains the RAS Mode that is currently
selected but could not be configured. ED2 gives the reason for the RAS configuration failure – at present, only two “RAS
Configuration Error Type” values are implemented:
0 = None – This is used for an AC power-on log record when the RAS configuration is successfully configured.
3 = Invalid DIMM Configuration for RAS Mode – The installed DIMM configuration cannot support the currently selected RAS
Mode. This may be due to DIMMs that have failed or been disabled, so when this reason has been logged, the user
should check the preceding SEL events to see whether there are DIMM error events.
Table 58: Memory RAS Configuration Status Sensor Typical Characteristics
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