Marquette Hellige GmbH MicroSmart V 2.xx Page 16
Servicing Instructions 227 470 35 B - 97.12
EPROM
ROM comprises one 4MBit EPROM module (= 512KByte). The data bus width is 16Bit. Chipselect
is the CSBOOT of the 68332.
RAM
RAM comprises a maximum of four static RAM modules with 128KByte each. The data bus width
is 16Bit. Each RAM chip receives its own chip-select signal (separate chip-select for High and Low
Byte) from the controller. This means that the RAM address is software-configurable. The basic
MicroSmart unit is only equipped with two RAMs, corresponding to a memory area of 256KByte.
The memory capacity can be extended to 512KByte by adding two more RAMs. Access time is 70
ns, this means that access is allowed
without Wait States.
EEPROM
A serial EEPROM is used for the non-volatile memory. This is connected to the QSPI interface of
the 68332. The EEPROM has a memory area of 2048 Bit. (= 256Byte)
Reset Generation
Reset Generation is implemented with an integrated monitor module. It includes the voltage
monitoring with Reset Generation.
Acoustic signal output
The MicroSmart has a sound output for acoustic status/alarm signals. The pitch is selected via a TPU
channel of the 68332 (signal name: Beep). In addition, the volume can be varied in 3 stages. Volume
is set via the 3 signals LAUT1, LAUT2 and LAUT3.
Real-time clock
Provides the time and date. During operation it is supplied by the Supply logic; when the unit is
turned off, the unit switches over automatically to a 3V lithium cell which preserves the data. The
control signals for the clock (chipselect- read/write signal) are generated directly by the controller
(MC68332).
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