2Mp3
2Ns1 2Ns2
1Mp3 1Ns21Ns1
2Mp3
2Ns1 2Ns2
1Ns1
1Mp3
2Ns1
2Ns2
2Mp3
1Ns2
LB/LW 0 100 280 37F
3FF
LB/LW 0 180 27F200
2Mp3
2Ns1 2Ns2
B/W 0 180 27F 3FF200
1Mp3 1Ns2
1Ns1
B/W 0 100 280 37F 3FF
1Ns2
2Mp3 2Ns1 2Ns2
1Mp3 2Mp3
0
100
280
37F
LB/LW 0 100 280 37F
LB/LW 0 180 27F200100
1Mp3
B/W
180 200
180
200
100
Flow of LB/LW link data
Common parameters
Common parameters
Network2
CPU
Network1
CPU
Link refresh
Link refresh
Link refresh
Link refresh
Inter link transfer
[Designation of arrow in the figure]
Cyclic communication
Inter-link data transfer
Link refresh
Transfers LB/LW of MELSECNET/H to the device of CPU.
Gateway station
Inter-link data transfer from module 1 to 2
Inter-link data transfer from module 2 to 1
Transfers LB/LW which has been set on common parameter to all
stations of MELSECNET/H by cyclic communication.
Cyclic
communication
Cyclic
communication
Cyclic
communication
MELSECNET/H
Network 2
Normal station 2Ns1/
Normal station 2Ns2
MELSECNET/H
Network 2
Control station 2Mp3
MELSECNET/H
Network 1
Normal station
1Ns1
MELSECNET/H
Network 1
Control station 1Mp3/
Normal station 1Ns2
Network1, 2
Gateway station
1Ns1/2Mp3
CPU
Transfers LB/LW between modules with
different network numbers mounted to
one CPU.
Link refresh