Mitsubishi MELSEC QCPU - Timers (OUT T, OUTH T)

5 - 20 5 - 20
MELSEC-Q/QnA
5 SEQUENCE INSTRUCTIONS
High Performance
QnA Q4AR
Basic
QCPU
PLC CPU
Process CPU
5.3.2 Timers (OUT T, OUTH T)
Usable Devices
Internal Devices
(System, User)
MELSECNET/10(H)
Direct J
\
Set
Data
Bit Word
File
Register
Bit Word
Special
Function
Module
U
\G
Index
Register
Zn
Constant
K
Other
D
(Only T)
Set
value
(Other
than T,C)
2 1
[Instruction Symbol] [Execution Condition]
OUTH ST
(High speed retentive timer)
OUT ST
(Low speed retentive timer)
OUTH T
(High speed timer)
OUT T
(Low speed timer)
T0
K50
T0
D10
Set value
Contents of data register
settings from 1 to 32767
are valid
T0
Set value
Settings from 1 to 32767
are valid
K50H
T0
Set value
Contents of data register
settings from 1 to 32767
are valid
D10H
ST0
Set value
Settings from 1 to 32767
are valid
K50
ST0
Set value
Contents of data register
settings from 1 to 32767
are valid
D10
ST0
Set value
Settings from 1 to 32767
are valid
K50H
ST0
Set value
Contents of data register
settings from 1 to 32767
are valid
D10H
Set value
Settings from 1 to 32767
are valid
REMARK
1: Timer values can be set only as a decimal constant (K).
Hexadecimal constants (H) and real numbers cannot be used for timer settings.
2: The file register cannot be used in the Q00JCPU.
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