2 - 18 2 - 18
MELSEC-Q/QnA
2 INSTRUCTION TABLES
Table 2.11 Arithmetic Operation Instructions (Continued)
Category
Instruction
Symbols
Symbol Processing Details
Execution
Condition
Number of
Basic Steps
Subset
See for
Description
INC
INC D
INCP
INCP D
• (D)+1
(D)
2 6-53
DINC
DINC D
DINCP
DINCP D
• (D+1, D)+1
(D+1, D)
1 6-55
DEC
DEC
D
DECP
DECP D
• (D)-1 (D)
2 6-53
DDEC
DDEC D
BIN data
increment
DDECP
DDECP D
• (D+1, D)-1
(D+1, D)
1 6-55
REMARKS
1) 1:The number of steps may vary depending on the device and type of CPU module being
used.
Component Nomber of basic steps
(1) When using the following devices only
• Word device : Internal device (except for file register ZR)
• Bit device : Devices whose device Nos. are multiples of 16, whose digit
designation is K8, and which use no index modification.
• Constant : No limitations
Note 1)
3
High Performance model QCPU
Process CPU
(2) When using devices other than (1)
Note 2)
2
Basic model QCPU
QnCPU
2 Note 2)
Note 1:With High Performance module QCPU, (1) requires more number of steps, while it can
process the steps faster, as compared with (2).
Note 2:The number of steps may increase due to the conditions described in Section 3.8.
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