NAD C715_MCU_Port Table
Date : 2007/12/22
1 A20/P9.6 I/O O VFD-CE VFD chip enable pin
2 A21/P9.7 I/O NC
3 WAIT/WKUP5/P5.0 I/O I DAB-DI DAB data in
4 WKUP6/WDOUT/P5.1 I/O I/O DAB-CLK DAB clock
5 SIN/WKUP2/P5.2 I/O I/O DAB-DO DAB data out/update port
6 WDIN/SOUT/P5.3 I/O I DAB-ON update port
7 TXCLK/CLKOUT/P5.4 I/O I update port
8 RXCLK/WKUP7/P5.5 I/O I/O STANBY Standby LED on (active "H")/update port
9 DCD/WKUP8/P5.6 I/O O F-MUTE System mute (active "H")
10 WKUP9/RTS/P5.7 I/O O TCC-CE TCC760 chip enable(USB host I.C)
11 ICAPA1/P4.0 I/O I Option FM frequency step (low : 50kHz, high : 100 kHz)
12 CLOCK2/P4.1 I/O I Option AM frequency step (low : 10kHZ, high : 9kHZ)
13 OCMPA1/P4.2 I/O I Option RDS on,off (low : off, high : on)
14 VSS GND GND
15 VDD VDD +5V
16 ICAPB1/OCMPB1/P4.3 I/O I Option Real time mode(low : 12 hours, high : 24 hours)
17 EXTCLK1/WKUP4/P4.4 I/O I/O R/T SDA Real time i.c serial data
18 EXTRG/STOUT/P4.5 I/O I/O R/T SCL Real time i.c serial clock
19 SDA/P4.6 I/O I R/T IRQ Real time i.c interrupt output
20 WKUP1/SCL/P4.7 I/O O F-STB Function i.c strobe output
21 ICAPB0/P3.1 I/O I Option DAB on,off (low : off, high : on)
22 ICAPA0/OCMPA0/P3.2 I/O I Option RESERVED
23 OCMPB0/P3.3 I/O O TCC-RST TCC760 i.c reset(USB host I.C), active"L"
24 EXTCLK0/SS/P3.4 I/O I GND GND
25 MISO/P3.5 I/O O TCC-DI TCC760 i.c data in
26 MOSI/P3.6 I/O I TCC-DO TCC760 i.c data out
27 SCK/WKUP0/P3.7 I/O I/O TCC-SCLK TCC760 i.c serial clock
28 VREG VREG Stabilization capacitor(s) for internal voltage regulator
29 RW NC
30 TINPA0/P2.0 I/O I PROTECT Protect in, active "L"
31 TINPB0/P2.1 I/O O SP-ON Speaker on, active "H"
32 TOUTA0/P2.2 I/O I H/P-IN Headphone in, active "L"
33 TOUTB0/P2.3 I/O NC
34 TINPA1/P2.4 I/O O T-MUTE Tuner mute, active "H"
35 TINPB1/P2.5 I/O O V-CLK VFD clock pin
36 TOUTA1/P2.6 I/O O V-DATA VFD serial data
37 TOUTB1/P2.7 I/O I BACK-UP Back-up, active "L"
38 VSS GND GND
39 VDD VDD +5V
40 VREG VREG Stabilization capacitor(s) for internal voltage regulator
41 VTEST GND Must be kept low in standard operating mode
42 A8/P1.0 I/O O CD-OPEN-M CD open motor pin
43 A9/P1.1 I/O NC
44 A10/P1.2 I/O O CD-CCE communication chip enalbe with CD DSP
45 A11/P1.3 I/O O CD-BUCK communication clock with CD DSP
46 WKUP6 NC
47 NC NC
48 A12/P1.4 I/O NC
49 A13/P1.5 I/O O CD-POWER optical out change of DAB and CD
50 A14/P1.6 I/O O MT-STBY Motor drive i.c standby pin
51 P1.7/A15 I/O O CD-RST CD dsp reset pin
52 DS NC
53 AS NC
54 P0.0/A0/D0 I/O I/O CD-BUS0 receive data or send command for CD DSP
55 P0.1/A1/D1 I/O I/O CD-BUS1 receive data or send command for CD DSP
56 P0.2/A2/D2 I/O I/O CD-BUS2 receive data or send command for CD DSP
57 P0.3/A3/D3 I/O I/O CD-BUS3 receive data or send command for CD DSP
58 P0.4/A4/D4 I/O I CD-OPEN-SW CD open switch pin
59 P0.5/A5/D5 I/O I CD-CLOSE-SW CD close switch pin
60 P0.6/A6/D6 I/O I CD-LIMIT-SW CD inner switch pin
61 VSS GND GND
62 VDD VDD +5V
63 P0.7/A7/D7 I/O O CD-CLOSE-M CD close motor pin
64 P6.0/INT0/INT1/CLOCK2/8 I/O NC
65 P6.1/INT6/RW I/O I REMOTE Remote in pin
66 P6.2/INT2/INT4/DS2 I/O I RDS-CLK RDS serial clock
67 P6.3/INT3/INT5 I/O I MP3-REQ Request pin for MP3 DSP
68 P6.4/NMI I/O O MP3-STBY 1Mb sram standby pin
69 P6.5/WKUP10/INTCLK I/O NC
70 NC NC
71 P8.0/AIN0/WKUP14 I/O I KEY2 Key input 2
72
P8.1/AIN1/WKUP15
I/O
I KEY1 Key input 1
Name Note
pin
No
Port Name
I/O use
2-6
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