National Instruments PCI E Series - Page 114

Chapter 4 Programming
© National Instruments Corporation 4-51 PCI E Series RLPM
G0_Output_Mode=2; (toggle on TC)
G0_Gate_Polarity = 1; (enable inversion)
G0_Reload_source_switching=1;
G0_Loading_On_Gate = 0;
G0_Loading_On_TC = 1;
GO_Gating_Mode = 2;
G0_Gate_On_Both_Edges = 0;
GO_Trigger_Mode_For_Edge_Gate = 2;
G0_Stop_Mode = 0;
G0_Counting_Once = 0;
G0_Command_Register
G0_Up_Down = 0; (down counting)
G0_Bank_Switch_Enable = 0;
or
G0_Bank_Switch_Enable = 1
if you want to change rate. Then call
G0_Seamless_Pulse_Train_Change()
G0_Bank_Switch_Mode = 0;
Interrupt_A_Enable_Register
G0_TC_Interrupt_Enable = 0;
G0_Gate_Interrupt_Enable = 0;
4. Call
G0_Out_Enable() to enable GPCTR0_Out pin.
Analog_Trigger_Etc_Register
GPFO_0_Output_Enable =1;
GPFO_0_Output_Select=0;
5. Call
G0_Arm() to begin the operation.
G0_Command_Register
G0_Arm=1;
6. Call
G0_Seamless_Pulse_Train() to change the pulse rate during
the operation.
/*Check if you can legally change the rate. You cannot
change the rate twice in a row before
generation of at least one cycle of intermediate
frequency*/
if ((G0_Bank_St==1)==g_bank_to_be_used) then
{
G0_Load_A_Register (24 bits)
G0_Load_A <= pulse interval -1 (3)
G0_Load_B_Register
G0_Load_B <= pulsewidth -1 (3)