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National Instruments PCI E Series - AI AO Select Register

National Instruments PCI E Series
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Chapter 3 Register Map and Descriptions
PCI E Series RLPM 3-22
©
National Instruments Corporation
AI AO Select Register
The AI AO Select Register contains 8 bits that control the logical DMA selection for the
analog input and analog output resources. The contents of this register are cleared upon power
up and after a reset condition.
Address: Base address + 09 (hex)
Type: Write-only
Word Size: 8-bit
Bit Map:
Bit Name Description
7-4 Reserved Reserved—Always write 0 to these bits (for PCI-6032E
and PCI-6033E only).
7–4 Output <D..A> Analog Output Logical Channel D through A—These four
bits select the logical channels of the MITE to be used by
the analog output. You can only set one of these bits at a
time (except for the PCI-6032E and PCI-6033E).
3–0 Input <D..A> Analog Input Logical Channel D through A—These four
bits select the logical channels to be used by the analog
input. You can only set one of these bits at a time.
7 6 5 4 3 2 1 0
Output D/
Reserved
Output C/
Reserved
Output B/
Reserved
Output A/
Reserved
Input D Input C Input B Input A

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