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National Instruments PCI E Series - Page 157

National Instruments PCI E Series
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Index
PCI E Series RLPM I-6
©
National Instruments Corporation
documentation
about this manual, xiii
conventions used in manual, xiv-xv7
organization of manual, xiv
related documentation, xv
DOTRIG0 bit, 4-52
E
EEPROM
calibration constant storage, 2-11, 5-1
PCI-6023E map (table), 5-9
PCI-6024E and PCI-6025E map (table),
5-10 to 5-11
PCI-6052E map (table), 5-12 to 5-14
PCI-MIO-16E-1, PCI-MIO-16E-4, and
PCI-MIO-6071E map (table),
5-3 to 5-4
PCI-MIO-16XE-10 and PCI-6031E,
PCI-6032E, and PCI-6033E map,
5-7 to 5-8
PCI-MIO-16XE-50 map, 5-5 to 5-6
reading from, 5-1 to 5-2
writing to accidentally (note), 5-2
EEPromCS bit, 3-4, 5-1
electronic support services, A-1 to A-2
e-mail support, A-2
ExtRef bit, 3-16 to 3-17
EXTSTROBE* signal, digital I/O
circuitry, 2-24
F
fax and telephone support numbers, A-2
Fax-on-Demand support, A-2
FIFO
analog output, 2-22
configuration memory, 2-8
overflow, 2-11
theory of operation, 2-10 to 2-11
waveform generation, 2-23 to 2-24
FIFO Strobe Register Group
ADC FIFO Clear Register, 3-24
Configuration Memory Clear
Register, 3-24
DAC FIFO Clear Register, 3-24
register map, 3-3
FIFO_Request_Selection function, 4-58
files for example programs, 4-6
FTP support, A-1
G
G0 G1 Select Register
description, 3-23
register map, 3-2
G0_Arm function
buffered pulsewidth measurement, 4-48
continuous pulse train generation
example, 4-51
gated event counting example, 4-47
G0_Out_Enable function, 4-51
G0_Reset_All function, 4-45
G0_Seamless_Pulse_Train function, 4-51
G0_Watch function, 4-47
Gain<2..0> bits, 3-10
GATE signal, timing I/O circuitry, 2-25
gated event counting example, 4-45 to 4-47
general-purpose counter/timer
programming considerations, 4-45
programming examples, 4-45 to 4-52
buffered pulsewidth measurement,
4-47 to 4-49
continuous pulse train generation,
4-49 to 4-52
gated event counting, 4-45 to 4-47
GenTrig bit, 3-9
GENTRIG0 signal, 4-52
getvect() function, 4-14
ghost channel
definition, 2-9

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