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NXP Semiconductors MPC5746R - Page 49

NXP Semiconductors MPC5746R
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Example Communication Peripheral connections
MPC5746R Hardware Design Guide, Rev. 1
NXP Semiconductors 49
A controlled impedance PCB is required for the LVDS signals.
The differential LVDS + and pair should be routed parallel and close to each other. The length of
the + and - pairs should be matched to less than 0.1 inches of difference.
The LVDS transmit pairs length is not required to be same length as the LVDS receiver pair.
The differential pair should be routed with a maximum of two vias. Ideally, the differential pair
should be routed without vias on a single plane of the board preferably on the top or bottom plane
of the board. However, due to pin escape issues with the placement of the high speed signals on the
surface mounted devices, routing on a single layer is usually not possible.
Keep necking of the signal to less than 0.01 inch to avoid discontinuities. Some necking is usually
required in escaping the signals for the BGA or LQFP signal feeds to other layers on the board.
The differential pair must be routed on a layer that is one dielectric away from ground.
A connector is not recommended for the Zipwire interface, but if a connector is used, a high speed
connector system, such as the Samtec ERF8 0.8 mm Edge Rate Rugged High Speed Socket, should
be used with twin-ax cabling. The odd side of the connector should be placed parallel and nearest
to the MCU package on the board to allow direct connection to the package signals.
10.5 Ethernet interface
Ethernet is a communication technology that was originally developed for creating local area networks
(LANs) between computers. Over time, it has become the standard wired communications network for the
PC and is widely used within telecommunications and industrial applications. In recent years, Ethernet has
found its way into automotive electronics with deployment in diagnostic and camera applications.
The Fast Ethernet Controller (FEC) implemented on the MPC5746R devices is a communication
controller that supports 10 and 100 Mbit/s Ethernet/IEEE 802.3 networks. An external transceiver
interface and transceiver function are required to complete the connection to the physical interface. The
figure below shows a typical set up of the complete interface to the network. Here a TJA1100 from NXP
is used as the Ethernet physical interface (PHY).
The following figure illustrates the Ethernet configuration of MCU to Ethernet connector.
Figure 33. Ethernet application configuration example
MCU
MPC5746R
FEC
MII / RMII
ETHERNET PHY
TJA1100
10/100mbps
CLK
MII - 25MHz
RMII - 50MHz
MAGNETICS
RJ45

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